An FPGA-based parallel sorting architecture for the Burrows Wheeler transform J Martinez, R Cumplido, C Feregrino Reconfigurable Computing and FPGAs, 2005. ReConFig 2005. International …, 2005 | 65 | 2005 |

Bit-serial and digit-serial GF (2m) Montgomery multipliers using linear feedback shift registers M Morales-Sandoval, C Feregrino-Uribe, P Kitsos IET Computers & Digital Techniques 5 (2), 86-94, 2011 | 45 | 2011 |

FPGA hardware architecture of the steganographic context technique E Gómez-Hernández, C Feregrino-Uribe, R Cumplido 18th International Conference on Electronics, Communications and Computers …, 2008 | 40 | 2008 |

A versatile linear insertion sorter based on an FIFO scheme R Perez-Andrade, R Cumplido, C Feregrino-Uribe, FM Del Campo Microelectronics Journal 40 (12), 1705-1713, 2009 | 35 | 2009 |

An area/performance trade-off analysis of a GF (2m) multiplier architecture for elliptic curve cryptography M Morales-Sandoval, C Feregrino-Uribe, R Cumplido, I Algredo-Badillo Computers & Electrical Engineering 35 (1), 54-58, 2009 | 30 | 2009 |

On the hardware design of an elliptic curve cryptosystem M Morales-Sandoval, C Feregrino-Uribe Proceedings of the Fifth Mexican International Conference in Computer …, 2004 | 26 | 2004 |

FPGA-based implementation alternatives for the inner loop of the Secure Hash Algorithm SHA-256 I Algredo-Badillo, C Feregrino-Uribe, R Cumplido, M Morales-Sandoval Microprocessors and Microsystems 37 (6-7), 750-757, 2013 | 25 | 2013 |

A compact FPGA-based processor for the Secure Hash Algorithm SHA-256 R García, I Algredo-Badillo, M Morales-Sandoval, C Feregrino-Uribe, ... Computers & Electrical Engineering 40 (1), 194-202, 2014 | 23 | 2014 |

A reconfigurable GF(2^{M}) elliptic curve cryptographic coprocessorM Morales-Sandoval, C Feregrino-Uribe, R Cumplido, I Algredo-Badillo 2011 VII Southern Conference on Programmable Logic (SPL), 209-214, 2011 | 22 | 2011 |

A hardware architecture for elliptic curve cryptography and lossless data compression MM Sandoval, C Feregrino-Uribe 15th International Conference on Electronics, Communications and Computers …, 2005 | 22 | 2005 |

High payload data-hiding in audio signals based on a modified OFDM approach JJ Garcia-Hernandez, R Parra-Michel, C Feregrino-Uribe, R Cumplido Expert Systems with Applications 40 (8), 3055-3064, 2013 | 21 | 2013 |

Adaptive Steganography based on textures DR Herrera-Moro, R Rodríguez-Colín, C Feregrino-Uribe 17th International Conference on Electronics, Communications and Computers …, 2007 | 21 | 2007 |

Efficient hardware architecture for the AES-CCM protocol of the IEEE 802.11 i standard I Algredo-Badillo, C Feregrino-Uribe, R Cumplido, M Morales-Sandoval Computers & Electrical Engineering 36 (3), 565-577, 2010 | 20 | 2010 |

FPGA implementation and performance evaluation of AES-CCM cores for wireless networks I Algredo-Badillo, C Feregrino-Uribe, R Cumplido, M Morales-Sandoval 2008 International Conference on Reconfigurable Computing and FPGAs, 421-426, 2008 | 20 | 2008 |

Area/performance trade-off analysis of an FPGA digit-serial GF (2m) Montgomery multiplier based on LFSR M Morales-Sandoval, C Feregrino-Uribe, P Kitsos, R Cumplido Computers & Electrical Engineering 39 (2), 542-549, 2013 | 17 | 2013 |

Design and implementation of an FPGA-Based 1.452-gbps non-pipelined AES architecture I Algredo-Badillo, C Feregrino-Uribe, R Cumplido International Conference on Computational Science and Its Applications, 456-465, 2006 | 16 | 2006 |

X-MatchPRO: A ProASIC-based 200 Mbytes/s full-duplex lossless data compressor JL Nunez, C Feregrino, S Jones, S Bateman International Conference on Field Programmable Logic and Applications, 613-617, 2001 | 16 | 2001 |

Watermarking using similarities based on fractal codification PA Hernandez-Avalos, C Feregrino-Uribe, R Cumplido Digital Signal Processing 22 (2), 324-336, 2012 | 15 | 2012 |

Towards the construction of a benchmark for video watermarking systems: Temporal desynchronization attacks PA Hernandez-Avalos, C Feregrino-Uribe, R Cumplido, ... 2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 628-631, 2010 | 15 | 2010 |

GF (2m) arithmetic modules for elliptic curve cryptography M Morales-Sandoval, C Feregrino-Uribe 2006 IEEE International Conference on Reconfigurable Computing and FPGA's …, 2006 | 15 | 2006 |