| An FPGA-based parallel sorting architecture for the Burrows Wheeler transform J Martinez, R Cumplido, C Feregrino 2005 International Conference on Reconfigurable Computing and FPGAs …, 2005 | 77 | 2005 |
| Pipelined CORDIC design on FPGA for a digital sine and cosine waves generator EO Garcia, R Cumplido, M Arias 2006 3rd International Conference on Electrical and Electronics Engineering, 1-4, 2006 | 63 | 2006 |
| On the design of an FPGA-Based OFDM modulator for IEEE 802.11 a J Garcia, R Cumplido 2005 2nd International Conference on Electrical and Electronics Engineering …, 2005 | 60 | 2005 |
| FPGA-based implementation alternatives for the inner loop of the Secure Hash Algorithm SHA-256 I Algredo-Badillo, C Feregrino-Uribe, R Cumplido, M Morales-Sandoval Microprocessors and Microsystems, 2012 | 58 | 2012 |
| A compact FPGA-based processor for the Secure Hash Algorithm SHA-256 R García, I Algredo-Badillo, M Morales-Sandoval, C Feregrino-Uribe, ... Computers & Electrical Engineering, 2013 | 55 | 2013 |
| A versatile linear insertion sorter based on an FIFO scheme R Perez-Andrade, R Cumplido, C Feregrino-Uribe, FM Del Campo Microelectronics Journal 40 (12), 1705-1713, 2009 | 52 | 2009 |
| On the design of an FPGA-based OFDM modulator for IEEE 802.16-2004 J Garcia, R Cumplido 2005 International Conference on Reconfigurable Computing and FPGAs …, 2005 | 42 | 2005 |
| Decision tree based fpga-architecture for texture sea state classification S Lopez-Estrada, R Cumplido 2006 IEEE International Conference on Reconfigurable Computing and FPGA's …, 2006 | 41 | 2006 |
| FPGA hardware architecture of the steganographic context technique E Gómez-Hernández, C Feregrino-Uribe, R Cumplido 18th International Conference on Electronics, Communications and Computers …, 2008 | 39 | 2008 |
| On the implementation of an efficient FPGA-based CFAR processor for target detection R Cumplido, C Torres, S López (ICEEE). 1st International Conference on Electrical and Electronics …, 2004 | 37 | 2004 |
| An area/performance trade-off analysis of a GF (2m) multiplier architecture for elliptic curve cryptography M Morales-Sandoval, C Feregrino-Uribe, R Cumplido, I Algredo-Badillo Computers & Electrical Engineering 35 (1), 54-58, 2009 | 31 | 2009 |
| Efficient hardware architecture for the AES-CCM protocol of the IEEE 802.11 i standard I Algredo-Badillo, C Feregrino-Uribe, R Cumplido, M Morales-Sandoval Computers & Electrical Engineering 36 (3), 565-577, 2010 | 29 | 2010 |
| Area/performance trade-off analysis of an FPGA digit-serial GF (2m) Montgomery multiplier based on LFSR M Morales-Sandoval, C Feregrino-Uribe, P Kitsos, R Cumplido Computers & Electrical Engineering, 2012 | 27 | 2012 |
| FPGA implementation and performance evaluation of AES-CCM cores for wireless networks I Algredo-Badillo, C Feregrino-Uribe, R Cumplido, M Morales-Sandoval Reconfigurable Computing and FPGAs, 2008. ReConFig'08. International …, 2008 | 26 | 2008 |
| A RECONFIGURABLE GF (2) ELLIPTIC CURVE CRYPTOGRAPHIC COPROCESSOR M Morales-Sandoval, C Feregrino-Uribe, R Cumplido, I Algredo-Badillo | 25* | |
| High payload data-hiding in audio signals based on a modified OFDM approach JJ Garcia-Hernandez, R Parra-Michel, C Feregrino-Uribe, R Cumplido Expert Systems with Applications, 2012 | 24 | 2012 |
| Compact FPGA hardware architecture for public key encryption in embedded devices L Rodríguez-Flores, M Morales-Sandoval, R Cumplido, C Feregrino-Uribe, ... PloS one 13 (1), e0190939, 2018 | 23 | 2018 |
| A configurable FPGA-based Hardware Architecture for Adaptive Processing of Noisy Signals for Target Detection Based on Constant False Alarm Rate (CFAR) Algorithms R Cumplido, C Torres, S López Global signal Processing Conference, GSPX 2004, 2004 | 22 | 2004 |
| Workshop on Applied Cryptography and Information Security (ACIS 2006)-Design and Implementation of an FPGA-Based 1.452-Gbps Non-pipelined AES Architecture I Algredo-Badillo, C Feregrino-Uribe, R Cumplido Lecture Notes in Computer Science 3982, 456-465, 2006 | 21* | 2006 |
| Design and Implementation of an FPGA-Based 1.452-Gbps Non-pipelined AES Architecture I Algredo-Badillo, C Feregrino-Uribe, R Cumplido Computational Science and Its Applications-ICCSA 2006, 456-465, 2006 | 21 | 2006 |
