Pablo Huerta
Pablo Huerta
Dirección de correo verificada de urjc.es
TítuloCitado porAño
OpenCL-based design methodology for application-specific processors
PO Jäskeläinen, S Carlos, P Huerta, JH Takala
2010 International Conference on Embedded Computer Systems: Architectures …, 2010
992010
Customized exposed datapath soft-core design flow with compiler support
O Esko, P Jaaskelainen, P Huerta, S Carlos, J Takala, JI Martinez
2010 International Conference on Field Programmable Logic and Applications …, 2010
832010
Platform based on open-source cores for industrial applications
M Bolado, H Posadas, J Castillo, P Huerta, P Sanchez, C Sánchez, ...
Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004
362004
A MicroBlaze based multiprocessor SoC.
P Huerta, J Castillo, JI Martinez, V Lopez
WSEAS Transactions on circuits and systems 4 (5), 423-430, 2005
292005
A secure self-reconfiguring architecture based on open-source hardware
J Castillo, P Huerta, V López, JI Martinez
2005 International Conference on Reconfigurable Computing and FPGAs …, 2005
282005
Fast median calculation method
J Cadenas, GM Megson, RS Sherratt, P Huerta
Electronics letters 48 (10), 558-560, 2012
252012
Hardware accelerated montecarlo financial simulation over low cost FPGA cluster
J Castillo, JL Bosque, E Castillo, P Huerta, JI Martínez
2009 IEEE International Symposium on Parallel & Distributed Processing, 1-8, 2009
182009
Secure IP downloading for SRAM FPGAs
J Castillo, P Huerta, JI Martínez
Microprocessors and Microsystems 31 (2), 77-86, 2007
172007
Operating system for symmetric multiprocessors on FPGA
P Huerta, J Castillo, C Sánchez, JI Martínez
2008 International Conference on Reconfigurable Computing and FPGAs, 157-162, 2008
162008
Exploring FPGA capabilities for building symmetric multiprocessor systems
P Huerta, J Castillo, JI Martinez, C Pedraza
2007 3rd Southern Conference on Programmable Logic, 113-118, 2007
162007
An open-source tool for SystemC to Verilog automatic translation
J Castillo, P Huerta, JI Martinez
Latin American applied research 37 (1), 53-58, 2007
152007
Parallel pipelined array architectures for real-time histogram computation in consumer devices
JO Cadenas, RS Sherratt, P Huerta, WC Kao
IEEE Transactions on Consumer Electronics 57 (4), 1460-1464, 2011
132011
SystemC design flow for a DES/AES CryptoProcessor
J Castillo, P Huerta, JI Martinez
WSEAS Transactions on Information Science and Applications, 193-198, 2004
112004
Genetic Algorithm for Boolean minimization in an FPGA cluster
C Pedraza, J Castillo, JI Martínez, P Huerta, JL Bosque, J Cano
The Journal of Supercomputing 58 (2), 244-252, 2011
102011
Symmetric multiprocessor systems on FPGA
P Huerta, J Castillo, C Pedraza, J Cano, JI Martinez
2009 International Conference on Reconfigurable Computing and FPGAs, 279-283, 2009
92009
A self-reconfigurable multimedia player on fpga
J Castillo, P Huerta, C Pedraza, JI Martínez
2006 IEEE International Conference on Reconfigurable Computing and FPGA's …, 2006
92006
Multi microblaze system for parallel computing
P Huerta, J Castillo, IJ Martinez, V López
Proceedings of the 9th International Conference on Circuits, str, 1-6, 2005
92005
Parallel pipelined histogram architectures
J Cadenas, RS Sherratt, P Huerta
Electronics letters 47 (20), 1118-1120, 2011
82011
Self-reconfigurable secure file system for embedded Linux
C Pedraza, J Castillo, JI Martínez, P Huerta, CS de La Lama
IET Computers & Digital Techniques 2 (6), 461-470, 2008
72008
C-slow retimed parallel histogram architectures for consumer imaging devices
J Cadenas, RS Sherratt, P Huerta, WC Kao, GM Megson
IEEE Transactions on Consumer Electronics 59 (2), 291-295, 2013
52013
El sistema no puede realizar la operación en estos momentos. Inténtalo de nuevo más tarde.
Artículos 1–20