Follow
Gaudencio Hernandez Sosa
Gaudencio Hernandez Sosa
Sr. Signal Integrity Engineer, Intel Corporation
Verified email at intel.com
Title
Cited by
Cited by
Year
Impedance matching of traces and multilayer via transitions for on-package links
G Hernandez-Sosa, R Torres-Torres, A Sanchez
IEEE Microwave and wireless components letters 21 (11), 595-597, 2011
252011
Characterization of electrical transitions using transmission line measurements
R Torres-Torres, G Hernández-Sosa, G Romo, A Sánchez
IEEE Transactions on Advanced Packaging 32 (1), 45-52, 2009
192009
Return-loss minimization of package interconnects through input space mapping using FEM-based models
JC Cervantes-González, CA López, JE Rayas-Sánchez, Z Brito-Brito, ...
2013 SBMO/IEEE MTT-S International Microwave & Optoelectronics Conference …, 2013
92013
Scalable models to represent the via-pad capacitance and via-traces inductance in multilayer PCB high-speed interconnects
A Isidoro-Muñoz, R Torres-Torres, MA Tlaxcalteco-Matus, ...
2017 International Caribbean Conference on Devices, Circuits and Systems …, 2017
72017
Characterization and modeling of electronic packages using S-parameters
G Hernandez-Sosa, G Romo, R Torres-Torres
2008 7th International Caribbean Conference on Devices, Circuits and Systems …, 2008
72008
Measuring bit error rate during runtime of a receiver circuit
GH Sosa, V Kollia
US Patent 9,264,187, 2016
52016
Intel Labs Mexico-Leading Industrial Research in Latin America
JR Camacho-Perez, G Hernandez-Sosa, A Alcocer-Ochoa, CA Lopez, ...
2014 IEEE MTT-S International Microwave Symposium (IMS2014), 1-3, 2014
42014
Analytical modeling of differential launch structures for RF measurements and characterization purposes
MA Tlaxcalteco-Matus, D García-Mora, R Torres-Torres, ...
2014 IEEE 18th Workshop on Signal and Power Integrity (SPI), 1-4, 2014
32014
Analytical calculation of the equivalent inductance for signal vias in parallel planes with arbitrary P/G via distribution
G Hernandez-Sosa, A Sanchez
2012 8th International Caribbean Conference on Devices, Circuits and Systems …, 2012
32012
Reducing glitches when reconstructing four‐port S‐parameters of differential transmission lines from two‐port measurements
DM García‐Mora, MA Tlaxcalteco‐Matus, R Torres‐Torres, ...
Microwave And Optical Technology Letters 56 (10), 2257-2260, 2014
22014
Return loss and crosstalk mitigation in coupled vias for modern high‐speed packaging
G Hernandez‐Sosa, R Torres‐Torres, A Sanchez
International Journal of RF and Microwave Computer‐Aided Engineering 22 (2 …, 2012
22012
High speed differential pinout arrangement including a power pin
RE Shibayama, CAL Moreno, GH SOSA, K Xiao
US Patent App. 16/902,832, 2021
12021
Structural optimization of contact geometry for high-performance connector
BTL Se-Jung Moon, Chien-Ping Kao, Gaudencio Hernandez Sosa
US Patent App. 16/857,833, 2021
1*2021
Electrical modeling and optimization of multilayer via transitions for fully-integrated systems
GH Sosa
Doktora Tezi, National Institute for Astrophysics, Optics and Electronics …, 2011
12011
Characterization and modeling of complex chip-to-chip interconnection channels on printed circuit boards using high-frequency techniques
G Hernández-Sosa
Intel, 2008
12008
Electrical routing component layout for crosstalk reduction
RE Shibayama, V Boddu, LNP ACOSTA, FJG MEDINA, K Xiao, ...
US Patent App. 16/128,284, 2020
2020
Electromagnetic Domain Decomposition for Through-Hole Mounting Connectors Models
G Hernandez-Sosa, S Moon, X Ye
2019 IEEE 28th Conference on Electrical Performance of Electronic Packaging …, 2019
2019
The system can't perform the operation now. Try again later.
Articles 1–17