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Ashraf Salem
Ashraf Salem
CEO, CyTwin Lab
Dirección de correo verificada de cytwinlab.com
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Citado por
Citado por
Año
An efficient implementation of floating point multiplier
M Al-Ashrafy, A Salem, W Anis
2011 Saudi International Electronics, Communications and Photonics …, 2011
1192011
Multimodal video sentiment analysis using deep learning approaches, a survey
SA Abdu, AH Yousef, A Salem
Information Fusion 76, 204-226, 2021
882021
Formal verification of VHDL descriptions in the Prevail environment
DD Borrione, LV Pierre, AM Salem
IEEE Design & Test of Computers 9 (2), 42-56, 1992
841992
Formal semantics of synchronous SystemC
A Salem
2003 Design, Automation and Test in Europe Conference and Exhibition, 376-381, 2003
732003
Combinational equivalence checking using Boolean satisfiability and binary decision diagrams
S Reda, A Salem
Proceedings Design, Automation and Test in Europe. Conference and Exhibition …, 2001
402001
Real-time mobile cloud computing: A case study in face recognition
M Ayad, M Taher, A Salem
2014 28th International Conference on Advanced Information Networking and …, 2014
322014
Semi-formal verification of VHDL-AMS descriptions
A Salem
2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat …, 2002
322002
A high performance algorithm for scheduling and hardware-software partitioning on MPSoCs
H Youness, M Hassan, K Sakanushi, Y Takeuchi, M Imai, A Salem, ...
2009 4th International Conference on Design & Technology of Integrated …, 2009
282009
A reconfigurable, pipelined, conflict directed jumping search SAT solver
M Safar, MW El-Kharashi, M Shalan, A Salem
2011 Design, Automation & Test in Europe, 1-6, 2011
242011
PREVAIL: A proof environment for VHDL descriptions
D Borrione, L Pierre, A Salem
Correct-Hardware-Design-Methodologies.-Proceedings-of-the-Advanced-Research …, 1992
241992
Denotational semantics of a synchronous VHDL subset
D Borrione, A Salem
Formal Methods in system design 7, 53-71, 1995
201995
Formal semantics of VHDL timing constructs
A Salem, D Borrione
VHDL for Simulation, Synthesis and Formal Proofs of Hardware, 195-206, 1991
191991
Multilevel minimised delay clustering protocol for wireless sensor networks
A Abdel-Hady, HMA Fahmy, SM Abd El-Kader, HS Eissa, A Salem
International Journal of Communication Networks and Distributed Systems 13 …, 2014
142014
A shift register based clause evaluator for reconfigurable sat solver
M Safar, M Shalan, MW El-Kharashi, A Salem
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
142007
An architecture of distributed co-simulation backplane
D Atef, A Salem, H Baraka
42nd Midwest Symposium on Circuits and Systems (Cat. No. 99CH36356) 2, 855-858, 1999
141999
FPGA based accelerator for functional simulation
MN Wageeh, AM Wahba, AM Salem, MA Sheirah
2004 IEEE International Symposium on Circuits and Systems (ISCAS) 5, V-V, 2004
132004
SoC connectivity specification extraction using incomplete RTL design: An approach for Formal connectivity Verification
H Saafan, MW El-Kharashi, A Salem
2016 11th International Design & Test Symposium (IDT), 110-114, 2016
122016
FPGA-based SAT solver
M Safar, MW El-Kharashi, A Salem
2006 Canadian Conference on Electrical and Computer Engineering, 1901-1904, 2006
122006
UML-L: a UML based design description language
H Hamed, A Salem
Proceedings ACS/IEEE International Conference on Computer Systems and …, 2001
122001
Code smells and detection techniques: a survey
RS Menshawy, AH Yousef, A Salem
2021 international mobile, intelligent, and ubiquitous computing conference …, 2021
112021
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