Miguel Aurelio Duarte-Villaseñor
Miguel Aurelio Duarte-Villaseñor
Instituto Tecnológico de Tijuana
Dirección de correo verificada de conacyt.mx - Página principal
TítuloCitado porAño
Applications of evolutionary algorithms in the design automation of analog integrated circuits
E Tlelo-Cuautle, I Guerra-Gomez, MA Duarte-Villasenor, LG de la Fraga, ...
Journal of Applied Sciences 10 (17), 1859-1872, 2010
472010
Binary Genetic Encoding for the Synthesis of Mixed-Mode Circuit Topologies
MA Duarte-Villaseñor, E Tlelo-Cuautle, LG de la Fraga
Circuits, Systems, and Signal Processing, 1-15, 2011
452011
Automatic synthesis of VFs and VMs by applying genetic algorithms
E Tlelo-Cuautle, MA Duarte-Villasenor, I Guerra-Gómez
Circuits, Systems, and Signal Processing 27 (3), 391-403, 2008
442008
Evolutionary electronics: automatic synthesis of analog circuits by GAs
E Tlelo-Cuautle, MA Duarte-Villaseáor
Success in evolutionary computation, 165-187, 2008
322008
Synthesis of CCII-s by superimposing VFs and CFs through genetic operations
E Tlelo-Cuautle, D Moro-Frías, C Sánchez-López, MA Duarte-Villaseñor
IEICE Electronics Express 5 (11), 411-417, 2008
272008
Designing SRCOs by combining SPICE and Verilog-A
E Tlelo-Cuautle, MA Duarte-Villasenor, JM Garcia-Ortega, ...
International Journal of Electronics 94 (4), 373-379, 2007
262007
Selection of MOSFET sizes by fuzzy sets intersection in the feasible solutions space
S Polanco-Martagón, G Reyes-Salgado, G Flores-Becerra, ...
Journal of applied research and technology 10 (3), 472-483, 2012
182012
Synthesis of Analog Circuits by Genetic Algorithms and their Optimization by Particle Swarm Optimization
E Tlelo-Cuautle, I Guerra-Gómez, CA Reyes-García, ...
Intelligent Systems for Automated Learning and Adaptation: Emerging Trends …, 2010
172010
Designing VFs by applying genetic algorithms from nullator-based descriptions
E Tlelo-Cuautle, MA Duarte-Villaseñor, CA Reyes-García, M Fakhfakh, ...
Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on …, 2007
132007
Designing Chua’s circuit from the behavioral to the transistor level of abstraction
E Tlelo-Cuautle, MA Duarte-Villaseñor
Applied mathematics and computation 184 (2), 715-720, 2007
122007
Automatic synthesis of electronic circuits using genetic algorithms
ET Cuautle, MAD Villaseñor, CAR García, GR Salgado
Computación y Sistemas 10 (3), 217-229, 2007
122007
Realization of multiscroll chaotic attractors by using current-feedback operational amplifiers.
JM Munoz-Pacheco, W Campos-Lopez, E Tlelo-Cuautle, ...
Trends in Applied Sciences Research 7 (2), 37-42, 2011
112011
Novelty search for the synthesis of current followers
E Naredo, MA Duarte-Villaseñor, MJ García-Ortega, CE Vázquez-López, ...
Computación y Sistemas 20 (4), 609-621, 2016
42016
Modeling and Simulation of a Chaotic Oscillator by MATLAB
E Tlelo-Cuautle, MA Duarte-Villasenor, JM Garcia-Ortega
IEEE Latin America Transactions 5 (2), 94-97, 2007
42007
Modelado y simulación de un oscilador caótico usando MatLab
E Tlelo-Cuautle, MA Duarte-Villaseñor, JM García-Ortega
IEEE Latin America Transactions 5 (2), 95-98, 2007
42007
Analysis, Design and Optimization of Active Devices
I Guerra-Gómez, E Tlelo-Cuautle, MA Duarte-Villasenor, ...
Integrated Circuits for Analog Signal Processing, 1-30, 2013
32013
Flexibility in biopharmaceutical manufacturing using particle swarm algorithms and genetic algorithms
Y El Hamzaoui, A Bassam, M Abatal, JA Rodríguez, MA Duarte-Villaseñor, ...
NEO 2015, 149-171, 2017
22017
Selection of the optimal sizes of analog integrated circuits by fuzzy sets intersection
GF Becerra, SP Martagon, MAD Villasenor, ET Cuautle, LG de la Fraga, ...
IEEE Latin America Transactions 12 (6), 1005-1011, 2014
22014
Optimal Sizing of Low-DropOut Voltage Regulators by NSGA-II and PVT Analysis
LG de la Fraga, VH Carbajal-Gomez, MA Duarte-Villasenor
Numerical and Evolutionary Optimization--NEO 2017 785, 225, 2019
12019
Symbolic Analysis and Synthesis of Analog Circuits Using Nullors and Pathological Mirror Elements
MA Duarte-Villaseñor, E Tlelo-Cuautle, LG de la Fraga, C Sánchez-López
Pathological Elements in Analog Circuit Design, 3-30, 2018
12018
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Artículos 1–20