| Proven correct monitors from PSL specifications K Morin-Allory, D Borrione Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006 | 91 | 2006 |
| On-line assertion-based verification with proven correct monitors D Borrione, M Liu, K Morin-Allory, P Ostier, L Fesquet 2005 International Conference on Information and Communication Technology …, 2005 | 29 | 2005 |
| A proof of correctness for the construction of property monitors K Morin-Allory, D Borrione Tenth IEEE International High-Level Design Validation and Test Workshop …, 2005 | 23 | 2005 |
| Online Monitoring of Properties Built on Regular Expressions Sequences K Morin-Allory, D Borrione Advances in Design and Specification Languages for Embedded Systems …, 2007 | 22 | 2007 |
| Assertion-based design with horus Y Oddos, K Morin-Allory, D Borrione 2008 6th ACM/IEEE International Conference on Formal Methods and Models for …, 2008 | 19 | 2008 |
| Proving and disproving assertion rewrite rules with automated theorem provers K Morin-Allory, M Boulé, D Borrione, Z Zilic 2008 IEEE International High Level Design Validation and Test Workshop, 56-63, 2008 | 17 | 2008 |
| Verification of safety properties for parameterized regular systems D Cachera, K Morin-Allory ACM Transactions on Embedded Computing Systems (TECS) 4 (2), 228-266, 2005 | 17 | 2005 |
| On-line test vector generation from temporal constraints written in PSL Y Oddos, K Morin-Allory, D Borrione 2006 IFIP International Conference on Very Large Scale Integration, 397-402, 2006 | 16 | 2006 |
| Mygen: Automata-based on-line test generator for assertion-based verification Y Oddos, K Morin-Allory, D Borrione, M Boulé, Z Zilic Proceedings of the 19th ACM Great Lakes symposium on VLSI, 75-80, 2009 | 15 | 2009 |
| High-level symbolic simulation for automatic model extraction F Ouchet, D Borrione, K Morin-Allory, L Pierre 2009 12th International Symposium on Design and Diagnostics of Electronic …, 2009 | 15 | 2009 |
| Synthorus: Highly efficient automatic synthesis from psl to hdl Y Oddos, K Morin-Allory, D Borrione 2009 17th IFIP International Conference on Very Large Scale Integration …, 2009 | 13 | 2009 |
| Horus: A tool for Assertion-Based Verification and on-line testing K Morin-Allory, Y Oddos, D Borrione Proc. MEMOCODE’08, 2008 | 13 | 2008 |
| Synthesis of property monitors for online fault detection K Morin-Allory, E Gascard, D Borrione Journal of Circuits, Systems, and Computers 16 (06), 943-960, 2007 | 13 | 2007 |
| Validating assertion language rewrite rules and semantics with automated theorem provers K Morin-Allory, M Boulé, D Borrione, Z Zilic IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 12 | 2010 |
| Asynchronous on-line monitoring of logical and temporal assertions K Morin-Allory, L Fesquet, B Roustan, D Borrione Embedded Systems Specification and Design Languages: Selected contributions …, 2008 | 12 | 2008 |
| Formal verification of c-element circuits C Yan, F Ouchet, L Fesquet, K Morin-Allory 2011 17th IEEE International Symposium on Asynchronous Circuits and Systems …, 2011 | 11 | 2011 |
| Delay insensitivity does not mean slope insensitivity! F Ouchet, K Morin-Allory, L Fesquet 2010 IEEE Symposium on Asynchronous Circuits and Systems, 176-184, 2010 | 11 | 2010 |
| FPU bit-width optimization for approximate computing: A non-intrusive approach NA Said, M Benabdenbi, K Morin-Allory 2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 1-6, 2020 | 10 | 2020 |
| High-level fault injection to assess FMEA on critical systems J Roux, V Beroulle, K Morin-Allory, R Leveugle, L Bossuet, F Cézilly, ... Microelectronics Reliability 122, 114135, 2021 | 9 | 2021 |
| Efficient and correct by construction assertion-based synthesis K Morin-Allory, FN Javaheri, D Borrione IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (12 …, 2015 | 9 | 2015 |
