| Fault-tolerant dynamic task mapping and scheduling for network-on-chip-based multicore platform N Chatterjee, S Paul, S Chattopadhyay ACM Transactions on Embedded Computing Systems (TECS) 16 (4), 1-24, 2017 | 36 | 2017 |
| Deadline and energy aware dynamic task mapping and scheduling for Network-on-Chip based multi-core platform N Chatterjee, S Paul, P Mukherjee, S Chattopadhyay Journal of Systems Architecture 74, 61-77, 2017 | 34 | 2017 |
| Task mapping and scheduling for network-on-chip based multi-core platform with transient faults N Chatterjee, S Paul, S Chattopadhyay Journal of Systems Architecture 83, 34-56, 2018 | 33 | 2018 |
| A spare router based reliable network-on-chip design N Chatterjee, S Chattopadhyay, K Manna 2014 IEEE international symposium on circuits and systems (ISCAS), 1957-1960, 2014 | 23 | 2014 |
| Reliability-aware application mapping onto mesh based Network-on-Chip N Chatterjee, P Mukherjee, S Chattopadhyay Integration 62, 92-113, 2018 | 22 | 2018 |
| Dynamic task mapping and scheduling with temperature-awareness on network-on-chip based multicore systems S Paul, N Chatterjee, P Ghosal Journal of Systems Architecture 98, 271-288, 2019 | 20 | 2019 |
| Dynamic task allocation and scheduling with contention-awareness for Network-on-Chip based multicore systems S Paul, N Chatterjee, P Ghosal Journal of Systems Architecture 115, 102020, 2021 | 14 | 2021 |
| Fault tolerant mesh based network-on-chip architecture N Chatterjee, S Chattopadhyay 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 417-420, 2015 | 14 | 2015 |
| FPGA based implementation of embedding and decoding architecture for binary watermark by spread spectrum scheme in spatial domain S Ghosh, S Talapatra, N Chatterjee, SP Maity, H Rahaman Bonfring International Journal of Advances in Image Processing 2 (4), 1, 2012 | 14 | 2012 |
| A permanent fault tolerant dynamic task allocation approach for Network-on-Chip based multicore systems S Paul, N Chatterjee, P Ghosal Journal of Systems Architecture 97, 287-303, 2019 | 13 | 2019 |
| VCS: a method of in-order packet delivery for adaptive NoC routing TS Das, P Ghosal, N Chatterjee Nano Communication Networks 28, 100333, 2021 | 8 | 2021 |
| Adaptive task allocation and scheduling on NoC-based multicore platforms with multitasking processors S Paul, N Chatterjee, P Ghosal, JP Diguet ACM Transactions on Embedded Computing Systems (TECS) 20 (1), 1-26, 2020 | 8 | 2020 |
| Attacks toward wireless network-on-chip and countermeasures AK Biswas, N Chatterjee, HK Mondal, G Gogniat, JP Diguet IEEE Transactions on Emerging Topics in Computing 9 (2), 692-706, 2020 | 8 | 2020 |
| Dual mode VLSI architecture for spread spectrum image watermarking using binary watermark S Ghosh, S Talapatra, J Sharma, N Chatterjee, H Rahaman, SP Maity Procedia Technology 6, 784-791, 2012 | 8 | 2012 |
| A spare link based reliable network-on-chip design N Chatterjee, N Prasad, S Chattapadhya 18th International Symposium on VLSI Design and Test, 1-6, 2014 | 7 | 2014 |
| Application of logical sub-networking in congestion-aware deadlock-free SDmesh routing TS Das, P Ghosal, N Chatterjee, A Nath, A Banerjee, S Khastagir ACM Transactions on Embedded Computing Systems (TECS) 19 (4), 1-26, 2020 | 5 | 2020 |
| Broadcast Mechanism Based on Hybrid Wireless/Wired NoC for Efficient Barrier Synchronization in Parallel Computing HK Mondal, N Chatterjee, R Cataldo, JP Diguet 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 265-270, 2020 | 5 | 2020 |
| CDMA-based Multiple Multicast communications on WiNOC for efficient parallel computing N Chatterjee, HK Mondal, R Cataldo, JP Diguet Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip …, 2019 | 5 | 2019 |
| A strategy for fault tolerant reconfigurable Network-on-Chip design N Chatterjee, P Mukherjee, S Chattopadhyay 2016 20th International Symposium on VLSI Design and Test (VDAT), 1-2, 2016 | 5 | 2016 |
| Virtual circuit switch based orderly delivery of packets in adaptive noc routing TS Das, P Ghosal, N Chatterjee Proceedings of the 12th International Workshop on Network on Chip …, 2019 | 4 | 2019 |
Santanu ChattopadhyayProfessor, Dept. of Electronics and Elec. Comm. Engg., Indian Institute of Technology, KharagpurDirección de correo verificada de ece.iitkgp.ac.in
